Authors
- HY Cheng*
- Zhi-Lun Liu*
- Amlan Majumdar*
- Alexander Grun*
- Asit Ray*
- Jeff Su*
- Malte J. Rasch
- Fabio Carta*
- Lynne Gignac*
- Christian Lavoie*
- Cheng-Wei Cheng*
- M Bright Sky*
- HL Lung*
* External authors
Venue
- VLSI 2024
Date
- 2024
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State-Independent Low Resistance Drift SiSbTe Phase Change Memory for Analog In-Memory Computing Applications
HY Cheng*
Zhi-Lun Liu*
Amlan Majumdar*
Alexander Grun*
Asit Ray*
Jeff Su*
Malte J. Rasch
Fabio Carta*
Lynne Gignac*
Christian Lavoie*
Cheng-Wei Cheng*
M Bright Sky*
HL Lung*
* External authors
VLSI 2024
2024
Abstract
We developed a phase-change memory (PCM), with SiSbTe material, that showed state-independent resistance drift (v~0.04) at 65°C over the entire analog conductance range. We evaluated this PCM for In Memory Compute (IMC) applications simulating the performance of BERT model with the IBM Analog Hardware Acceleration Kit (AIHWKit). Drift and data retention are dependent on the amount of A-type dopant into SiSbTe materials. Finding a trade-off between the two is important to deliver a balanced material that can tackle IMC workload without losing in performance. The fabricated SiSbTe PCM devices maintain the BERT accuracy (<2% loss) for more than 7 days at 65°C and pass the data retention at 85 °C/48hrs demonstrating a great balance between the two metrics
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